I. PCI: PCI, Peripheral Component Interconnection Standard (Peripheral Component Interconnection)
A standard used to define a localized bus introduced by Intel in 1991. This standard allows up to 10 PCI-compliant expansion cards to be installed in a computer. The earliest proposed PCI bus operated at a frequency of 33MHz, with a transmission bandwidth of 133MB/s (33MHz * 32bit/s), which basically met the needs of the processor development at that time. With the requirement of higher performance, a 64-bit PCI bus was proposed in 1993, and later it was proposed to raise the frequency of PCI bus to 66 MHz. 32-bit and 33 MHz PCI buses are widely used at present, and 64-bit PCI slots are more often used in server products. From a structural point of view, PCI is a first-level bus inserted between the CPU and the original system bus, specifically by a bridge circuit to realize the management of this layer, and to realize the interface between the upper and lower to coordinate the transfer of data. The manager provides signal buffering to maintain high performance at high clock frequencies, and provides connectivity interfaces for graphics cards, sound cards, network cards, MODEMs, and other devices that operate at 33MHz/66MHz.
PCI bus systems require a PCI controller card, which must be installed in a PCI slot. This slot is the type of slot that motherboards currently come with the most number of slots. On current popular desktop motherboards, ATX architecture motherboards generally come with 5 to 6 PCI slots, while smaller MATX motherboards all come with 2 to 3 PCI slots. Depending on the implementation, the PCI controller can exchange 32-bit or 64-bit data with the CPU at a time, which allows intelligent PCI secondary adapters to perform tasks in parallel with the CPU utilizing a bus mastering technique.PCI allows for multiplexing techniques, which allows more than one electronic signal to be present at the same time on the bus.
Because the PCI bus has only 133MB/s of bandwidth, it appears to be more than adequate for the vast majority of input/output devices such as sound, network, and video cards, but not for the increasingly powerful graphics cards.Intel officially announced the third-generation of I/O technology designed to replace the PCI bus at the Spring 2001 IDF, and the specification was supported by Intel's On April 17, 2002, AWG officially announced that the draft of 3GIO1.0 specification was completed and handed over to PCI-SIG (PCI-Special Interest Group) for review. At the beginning everyone thought it would be named Serial PCI (influenced by Serial ATA), but in the end it was officially named PCI Express, which means high speed, extra fast.
On July 23, 2002, the PCI-SIG officially announced the PCI Express 1.0 specification, and in early 2007 introduced the 2.0 specification (Spec 2.0), which increased the transfer rate from 2.5GB/s in PCI Express 1.1 to 5GB/s.
II. The PCIIX PCI-X interfaces are concatenated. The updated version of the PCI bus still utilizes the traditional bus technology, but has a greater number of wiring pins, while all connected devices will ****enjoy all the available bandwidth, as mentioned earlier. The difference with the original PCI interface is that, instead of 32 bits, PCI-X uses a 64-bit width to transmit data, so the bandwidth is automatically doubled, and the length of the expansion slot is of course unavoidably increased, in addition to the rest, including the transmission of communication protocols, signals, and standard connector formats are all compatible with the benefits of 3.3V 32-bit PCI adapters can be used in PCI-X expansion slots, of course, but also in the case of a 3.3V 32-bit adapter. The benefit is that 3.3V 32-bit PCI adapters can be used in PCI-X expansion slots, or if you prefer, 64-bit PCI-X adapters can be connected to 32-bit PCI expansion slots, but the bandwidth speed will be greatly reduced. This improved version of the bus width multiplier still doesn't provide enough bandwidth for some specialized storage controllers such as SCSI, iSCSI, Fibre Channel, 10GBit Ethernet, and other transports such as InfiniBand, so the PCI-SIG interface has been introduced to provide a number of different speed grades from PCI-X66 all the way up to PCI-X66, and PCI-X66 to PCI-X66 and PCI-X66 to PCI-X66. 66 all the way up to the PCI-X 533 specification, the following table lists these technical details: Bus Width Frequency Speed Function Bandwidth PCI-X 66 64-bit 66MHz Hot Plugging,3.3V 533MB/s PCI-X 133 64-bit 133MHz Hot Plugging,3.3V 1.06GB/s PCI-X 266 64-bit / 16-bit option 133MHz Double Plugging,3.3V 1.06GB/s ECC supported 2.13gb/SPCI-X 533 64/16-bit option 133MHz Double Data Rate Hot Plugging,3.3V&1.5V ECC supported 2.13gb/SPCI-X 533 64/16-bit option 133MHz Quad Data Rate Hot Plugging,3.3&1.5V ECC supported 4.26GB/s You can see that when the frequency speed reaches 133MHz of PCI-X 133, it can no longer go up, in order to let the bandwidth can be multiplied, so they do not hesitate to the main memory and the front side of the bus has been in the line for a long time and everyone knows the technology to move over, so the PCI-X 266 with Double Data Rate technology, so that each clock pulse to make each clock pulse of the Double Data Rate technology. Technology, so that each clock pulse of the rising and falling edges can transmit data, so more than double the opportunity to transmit data, while the PCI-X 533 specification goes further by using a clock pulse can be transmitted four times the technology, Intel as early as all the Pentium 4 and Xeon processors on the front side of the bus to use these technologies. Third, PCIE: PCI-Express is the latest bus and interface standards, it was originally named "3GIO", was proposed by Intel, it is clear that Intel means that it represents the next generation of I / O interface standards. The name was changed to "PCI-Express" only after it was certified and released by PCI-SIG (PCI Special Interest Group). This new standard will fully replace the current PCI and AGP, and ultimately realize the unity of the bus standard. Its main advantage is the high data transfer rate, the current maximum can reach more than 10GB / s, and there is still considerable potential for development. PCI Express also has a variety of specifications, from PCI Express 1X to PCI Express 16X, to meet the present and future a certain period of time the emergence of low-speed and high-speed equipment needs. Intel's i915 and i925 series chipsets are the main ones that can support PCI Express. Of course, to achieve a comprehensive replacement of PCI and AGP also requires a fairly long process, as when PCI replaced ISA, there will be a transition process. Fourth, CPCI Compact PCI (Compact Peripheral Component Interconnect) referred to as CPCI, also known as Compact PCI, is the International Federation of Industrial Computer Manufacturers (PCI Industrial Computer Manufacturer's Group, referred to as PICMG) in 1994. (PICMG for short) in 1994 proposed a bus interface standard. It is a high-performance industrial bus standardized on PCI electrical specifications; the CPU and peripherals of CPCI are the same as those of standard PCI, and the CPCI system uses the same chips, firewalls, and related software as the traditional PCI system. Fundamentally, they are the same, so the operating system, drivers and applications do not feel the difference between the two, the conversion of a standard PCI plug-in card into a CPCI plug-in card almost does not need to be redesigned, as long as the physical reallocation can be. In order to use the PCI SIG's PCI bus specification in industrial control computer systems, in November 1995 PICMIG promulgated the CPCI specification version 1.0, and later successively introduced the PCI-PCI Bridge specification, Computer Telephony TDM specification and User-defined I/O pin assignment specification. In short CPCI bus = PCI bus electrical specification + standard pinhole connector + European card specification.
The emergence of CPCI not only allows for the continuation of many original PC-based technologies and mature products such as CPUs, hard disks, and so on, but also makes significant improvements in the interface and other places, so that servers and industrial computers that use CPCI technology have the advantages of high reliability and high density. CPCI is a high-performance industrial bus based on the PCI electrical specification and is suitable for 3U and 6U height circuit board design. the CPCI circuit board is inserted into the cabinet from the front, and the outlet of I/O data can be the interface on the front panel or the back panel of the cabinet. It solves the thorny problems faced by telecom system engineers and equipment manufacturers over the years, such as the incompatibility of the traditional telecom equipment bus, VME, with the industry-standard PCI bus.
CPCI technology is based on PCI technology through the transformation of the specific characteristics of three aspects:
First, continue to use the PCI local bus technology;
Second, the abandonment of the traditional mechanical structure of the IPC, and replaced by 20 years of practice has been tested by the high-reliability of the European card structure, improve the heat dissipation conditions, improve the vibration impact resistance, in line with the requirements of electromagnetic compatibility;
Second, the abandonment of IPC traditional mechanical structure, and replaced with 20 years of practice tested the structure of the European card, improve heat dissipation conditions, improve vibration impact resistance, meet the
Third, the IPC's gold finger interconnect is discarded in favor of a 2mm density pinhole connector, which is airtight and corrosion-resistant, further improving reliability and increasing load capacity.
The CPCI specification has gone through several versions since it was developed. The latest PICMG 3.0 specification of the CPCI technology architecture in a more open, standardized platform, is conducive to various types of system integrators, equipment suppliers to provide more convenient and rapid value-added services, to provide users with more cost-effective products and solutions. PICMG 3.0 standard is a completely new technology, and PICMG 2.x is completely different, especially in the speed of with the PICMG 2.x compared to PICMG 3.0 speed of up to 2Tb per second. PICMG 3.0 will be mainly used in high-bandwidth telecom transmission to adapt to the future development of telecommunications, PICMG 2.x is still the mainstream of the current CPCI, and will dominate the application of CPCI for a long time.
CPCI has hot-pluggable (Hot Swap), high openness, high reliability. the most prominent and attractive feature of CPCI technology is hot-swap. In short, it is a technology to unplug or insert functional templates without disrupting the normal operation of the system under the condition that the operating system is not powered down. Hot-plugging has always been a requirement for telecommunication applications and is desired by every industrial automation system. Its realization is: in the structure of the three different lengths of the pin pins, so that when the template is inserted or pulled out, the power supply and ground, PCI bus signals, hot swap start signal in order; the use of bus isolation devices and power supply of the soft start; in the software, the operating system should be plug-and-play functionality. Currently CPCI bus hot-plugging technology is from the basic hot-swap technology to the direction of high availability.
CPCI has a high degree of openness, high reliability, hot-pluggable features, so that the technology can be widely used in communications, networking, computer telephony in addition to the real-time system control, industrial automation, real-time data acquisition, military systems and other needs of high-speed computing, intelligent transportation, aerospace, medical equipment, water conservancy and other modularity and high reliability, and can be used for a long time. Application Fields. Because CPCI has a high bandwidth, it is also suitable for some high-speed data communication applications, including servers, routers, switches and so on.