Introduction
Background
Transistors are one of the greatest inventions in modern human history. Modern electronic devices such as computers, smartphones, smart hardware, etc., are inseparable from transistors. With the advent of integrated circuits, a large number of transistors can be packaged in a chip the size of a fingernail. This transistor consists of a source, a drain, and a gate between them, with the current flowing from the source to the drain, and the gate acting as a switch to control the current.
The famous Moore's Law states that "when the price remains constant, the number of transistors that can be accommodated on an integrated circuit will double about every 18 months, and the performance will double." As predicted by Moore's Law, today's transistors are shrinking in size, and the number of transistors integrated on a single chip is increasing, allowing for increasingly complex computing.
But in recent years, Moore's Law is facing serious challenges. Traditional transistors have been made primarily from silicon. For silicon transistors, 7 nanometers is the physical limit. Once a silicon transistor is smaller than that, electrons will no longer be subject to Ohm's law due to the "quantum tunneling effect," crossing barriers that would otherwise be impenetrable. This causes leakage in integrated circuits, making the transistor less reliable.
In order to solve these problems and keep Moore's Law alive and well, industry and science are actively searching for new materials that can replace silicon to produce a new generation of transistors that are smaller in size, have better performance, and consume less power.
For example, I have described the Lawrence Berkeley National Laboratory's use of carbon nanotubes and molybdenum disulfide to develop the world's smallest transistor, with a transistor process of only 1 nanometer.
Another example is that research at McGill University and the University of Montreal in Canada has shown that black phosphorus is expected to be a very good candidate for transistors. In addition, other two-dimensional materials such as graphene, hexagonal boron nitride, and tungsten diselenide can be used to build new transistors.
The fabrication of carbon nanotube field effect transistors (CNFETs) has become one of the main goals in building the next generation of computers. Studies have shown that CNFETs have ten times the energy efficiency of silicon, as well as faster operating speeds. But when mass-produced, these transistors often have so many performance-impairing defects that they seem impractical.
The microprocessor is based on the RISC-V open-source chip architecture, which has a set of instructions that the microprocessor can execute. The researchers designed the microprocessor to accurately execute the full instruction set, as well as a modified version of the classic "Hello, World! The researchers designed the microprocessor to accurately execute the full instruction set, as well as a modified version of the classic "Hello, World!" program, which prints out, "Hello, World! I am RV16XNano, made from CNTs." .
Max M. Shulaker, Assistant Professor in the Department of Electrical Engineering and Computational Sciences (EECS), member of the Microsystems Technology Laboratory, and co-author of the paper, said, "To date, this is the most advanced chip made from emerging nanotechnology, which promises to enable high-performance and energy-efficient computing. Silicon has limitations. So if we want to continue to make progress in computing, carbon nanotubes are one of the most promising ways to overcome those limitations. The research paper revolutionizes the way we make chips from carbon nanotubes."
The microprocessor was developed by Shulaker and other researchers on the basis of an iterative version designed six years ago, which had only 178 CNFETs and could only run on single bits of data. Since then, Shulaker and his colleagues at MIT have tackled three unique challenges in the fabrication of carbon nanotube microprocessors: material defects, fabrication defects, and functionality issues. gage Hills does most of the processor design work, while Christian Lau does most of the fabrication.
According to Shulaker, the inherent defects in carbon nanotubes have been the "bane" of the field for many years. Ideally, CNFETs need semiconductor properties to turn their conductivity on and off, corresponding to whether the bit is a 1 or a 0, respectively. Inevitably, however, a small percentage of carbon nanotubes will be metallic, slowing or preventing the transistor from switching. To avoid these failures, advanced circuits will require carbon nanotubes that are 99.999999% pure, which is nearly impossible to produce today.
The researchers came up with a technique called DREAM (short for "designing resiliency against metallic CNTs"). This technique places metallic CNFETs in such a way that they do not interfere with the computation. In the process, they relaxed the stringent purity requirements by four orders of magnitude, or 10,000 times, meaning that they only needed carbon nanotubes that were 99.99 percent pure, which is currently possible to prepare.
Basically, designing circuits requires a library of different logic gates connected to the transistor that can be combined together to create adders and multipliers in the same way that letters are stitched together to form words. The researchers found that metallic carbon nanotubes have different effects on different combinations of these logic gates. A single metallic carbon nanotube in logic gate A, for example, might break the connection between logic gate A and logic gate B. But several metal carbon nanotubes in logic gate B will not affect their connection.
In chip design, there are many ways to implement code on a circuit. The researchers ran simulations to find all the different combinations of logic gates that could be "robust" or "non-robust" to any metal-carbon nanotube. They then customized a chip design program to automatically find the combinations that were least likely to be affected by the metal-carbon nanotubes. When designing a new type of chip, the program would utilize only the "robust" combinations and ignore the vulnerable ones.
"The 'DREAM' pun is very meaningful because it's the dream solution," said Shulaker. This approach allows us to buy off-the-shelf carbon nanotubes, put them on a wafer, and go about constructing our circuits as we normally would, without having to do anything else special."
CNFET fabrication begins with depositing carbon nanotubes in solution onto a wafer with a predesigned transistor structure. However, some of the carbon nanotubes will inevitably stick together randomly to form large bundles, like spaghetti strung into small balls, creating large particle contaminants on the chip.
To remove this contamination, researchers invented the RINSE (removal of incubated nanotubes through selective exfoliation) technique. The wafers are pretreated with a reagent that promotes the bonding of carbon nanotubes. The wafers are then coated with a certain polymer and immersed in a special solvent. This washes away the polymer, which will only take away large bundles of carbon nanotubes, while the individual carbon nanotubes will remain adhered to the wafer. This technique reduces the particle density on the chip by about 250 times compared to other similar methods.
Finally, the researchers solved a common functionality problem with CNFETs. Two types of transistors are required for binary calculations: "N" transistors, which are turned on for bit 1 and off for bit 0, and "P" transistors, which are the opposite. Traditionally, fabricating these two types of transistors from carbon nanotubes has been a challenging task, as it usually results in transistors with different properties. To solve this problem, the researchers developed a technique called MIXED (metal interface engineering crossed with electrostatic doping), which precisely tunes the functionality and optimization of the transistors.
In this technology, they attach certain metals (platinum or titanium) to each transistor so that the transistor can be fixed as either P or N. Then, they coat the CNFETs with some kind of oxide compound through atomic layer deposition, which adjusts the characteristics of the transistor to meet the needs of a particular application. For example, servers often require transistors that run fast but consume a lot of power. On the other hand, wearables and medical implants may require slower transistors that consume less power.
The future
Their main goal is to bring the chip to the real world. To accomplish that, the researchers have now begun applying their fabrication techniques to a silicon chip foundry through a program of the U.S. Department of Defense's Advanced Research Projects Agency, which is supporting the research. Although no one can yet say when a chip made entirely of carbon nanotubes will hit the market, Shulaker said. But Shulaker says, "It could be realized within five years. We think it's no longer a question of if, but when.
Keywords
References
1Gage Hills et al. Modern microprocessor built from complementary carbon nanotube transistors, Nature. nanotube transistors, Nature (2019). DOI: 10.1038/s41586-019-1493-8
2http://news.mit.edu/2019/carbon-nanotubes-microprocessor-0828