nor flash start address problem

NOR and NAND are the two main non-volatile flash memory technologies on the market today. Intel first developed NOR flash technology in 1988, revolutionizing the EPROM and EEPROM world. Immediately after, in 1989, Toshiba announced the NAND flash architecture, which emphasized lower cost per bit, higher performance, and easy upgradability through interfaces like disks. But after more than a decade, there are still a fair number of hardware engineers who can't tell the difference between NOR and NAND flash.

Phase "flash memory" is often used interchangeably with phase "NOR memory". Many people in the industry are also confused about the superiority of NAND flash technology over NOR, because most of the time flash is used to store only a small amount of code, which is where NOR flash is more appropriate. NAND, on the other hand, is an ideal solution for high data storage densities.

NOR features in-chip execution (XIP, eXecute In Place), which allows applications to run directly in flash memory without having to read code into system RAM. NOR has high transfer efficiency and is cost-effective for small volumes of 1 to 4MB, but very low write and erase speeds greatly affect its performance. .

The NAND architecture provides extremely high cell density, allowing high storage densities to be achieved and fast write and erase speeds. Difficulties in applying NAND include flash management and the need for special system interfaces.

PERFORMANCE COMPARISON

Flash flash memory is non-volatile memory that can be erased and reprogrammed in blocks of memory cells called blocks. Write operations to any flash device can only be performed on empty or erased cells, so in most cases an erase must be performed before a write operation can take place. while NAND devices perform an erase operation very easily, NOR requires that all bits in the target block be written to 0 before an erase can take place.

Since an erase of a NOR device takes place in 64- to 128-kilobyte (KB) blocks, performing a write to a block can be a very difficult task, but it is not necessary to perform a write to a block. block size, it takes 5s to perform a write/erase operation, whereas in contrast, erasing a NAND device is performed in 8-32KB blocks, and it takes up to 4ms to perform the same operation.

The difference in block size when performing an erase further widens the performance gap between NOR and NADN, with statistics showing that for a given set of writes (especially when updating a small file), more bits are written in the target block than in the target block. files), more erase operations must be performed in NOR-based cells. Thus, when choosing a storage solution, designers must weigh each of the following factors.

● NOR is slightly faster to read than NAND.

● NAND is much faster to write than NOR.

● The 4ms erase speed of NAND is much faster than the 5s of NOR.

● Most write operations require an erase operation first.

● NAND has a smaller erase cell and correspondingly less erase circuitry.

Interface Differences

NOR flash comes with an SRAM interface with enough address pins for addressing, and every byte inside it can be easily accessed.

NAND devices use a complex I/O port to access data serially, and the method may vary from product to product or vendor to vendor. 8 pins are used to transfer control, address, and data information.

NAND read and write operations use 512-byte blocks, somewhat like a hard disk manages such operations, and naturally, NAND-based memories can replace hard disks or other block devices.

Capacity and cost

The cell size of a NAND flash is almost half the size of a NOR device, and because of the simpler production process, NAND structures can provide higher capacity in a given die size, which correspondingly lowers the price.

NOR flash accounts for the majority of the flash memory market with capacities of 1 to 16MB, while NAND flash is only used in products with capacities of 8 to 128MB, which suggests that NOR is primarily used in code storage media, and that NAND is suitable for data storage, with NAND being used in the CompactFlash, Secure Digital, PC NAND has the largest share of the CompactFlash, Secure Digital, PC Cards and MMC memory card markets.

Availability and endurance

A key consideration when using flahs media is availability. Flash is a very suitable storage solution for systems that require extended MTBF. Comparisons of NOR and NAND can be made in terms of lifetime (endurance), bit swapping, and bad block handling.

Lifetime (Endurance)

The maximum number of erasures per block in NAND Flash memory is one million, compared to 100,000 for NOR.In addition to the 10-to-1 block erase cycle advantage of NAND memory, typical NAND block sizes are eight times smaller than NOR devices, and the number of deletions per NAND memory block in a given time period is somewhat lower .

Bit Swapping

All flash devices suffer from the phenomenon of bit swapping. In some cases (rare, occurs more often with NAND than NOR), a bit is inverted or reported to be inverted.

A one-bit change may not be very noticeable, but if it happens to a critical file, this small glitch can cause system downtime. If it's just a problem with the report, a few more reads may fix it.

Of course, if the bit does change, an error-detection/error-correction (EDC/ECC) algorithm must be used. The problem of bit inversion is more commonly seen with NAND flash, and suppliers of NAND recommend using NAND flash with both EDC/ECC algorithms.

This problem is not fatal when storing multimedia information on NAND. Of course, if the local storage device is used to store operating systems, configuration files, or other sensitive information, the EDC/ECC system must be used to ensure reliability.

Bad Block Handling

Bad blocks in NAND devices are randomly distributed. There have been previous efforts to eliminate bad blocks, but the yield was found to be too low and too costly to be cost-effective.

NAND devices require an initialization scan of the media to find bad blocks and mark them as unavailable. Failure to perform this process in a manufactured device by a *able* method will result in a high failure rate.

Ease of use

It is very straightforward to use NOR-based flash memory that can be connected like any other memory and code can be run directly on it.

NAND is much more complex due to the need for I/O interfaces. Access methods for various NAND devices vary by manufacturer.

When using a NAND device, the driver must be written before you can continue with other operations. Writing to a NAND device requires considerable skill, as the designer must never write to a bad block, which means that virtual mapping must be done on the NAND device from start to finish.

Software support

When discussing software support, a distinction should be made between basic read/write/erase operations and higher-level software for disk emulation and flash management algorithms, including performance optimization.

Running code on a NOR device does not require any software support, and the same operation on a NAND device usually requires a driver, known as a Memory Technology Driver (MTD), which is required for both write and erase operations on both NAND and NOR devices.

The MTDs required for use with a NOR device are relatively minor, and many Vendors offer more advanced software for NOR devices, including M-System's TrueFFS driver, which is used by Wind River System, Microsoft, QNX Software System, Symbian, and Intel, among others.

The drivers are also used for emulation of DiskOnChip products and management of NAND flash memory, including error correction, bad block handling, and wear leveling.