Processor chips are the soft underbelly of China's semiconductor industry, and are the "necklace" problem facing China's semiconductor industry. In recent years, the domestic chip field of academia and industry are actively exploring practices, and strive to breakthrough. China's chip R & D in the field of the four technical barriers are lithography, electronic design automation (EDA) software, wafers and instruction sets. Therefore, the open source RISC-V instruction set architecture is of great significance to China's technological breakthrough in chip instruction set. China is expected to get rid of the foreign instruction set monopoly through RISC-V, breaking the technology blockade.
RISC-V has made rapid progress since its inception, and with the rise of IoT, 5G communications, artificial intelligence, and other technologies, IoT and embedded devices have become the first areas where RISC-V has landed and the largest application market. Research institutions and enterprises from various countries have joined the research and development, and RISC-V not only breaks the monopoly of ARM and Intel in the existing instruction set architecture environment, but also establishes an open ecosystem and framework to promote global cooperation and innovation.
Major national strategic initiatives and characteristics
The United States emphasizes the strategic application of the RISC-V instruction set in the field of intelligent equipment chips.
In June 2017, the U.S. Defense Advanced Research Projects Agency (DARPA) initiated the Electronics Resurgence Initiative, which is an initiative to promote the development of the RISC-V instruction set in the field of smart equipment chips. Resurgence Initiative" (Electronics Resurgence Initiative), the program aims to solve the semiconductor process bottlenecks to meet the challenges of the rapid development of the semiconductor industry. "For several years, the Electronics Resurgence Initiative has provided special support for the research and industrial application of the RISC-V instruction set. In particular, the Achieving Faster Integrated Circuits project, the Posh Open Source Hardware project, and the Intelligent Design of Electronic Assets project have explicitly identified the need for development based on the RISC-V instruction set. in March 2021, SciFive entered into an Open License Agreement with DARPA to authorize the addition of SciFive to the DARPA Toolkit Program (DARPA Toolkit). "In March 2021, SciFive entered into an Open License Agreement with DARPA to license SciFive into the DARPA Toolbox Initiative to provide DARPA program participants with access to RISC-V based 32-bit and 64-bit kernels in support of the development of apps and embedded applications within the DARPA program.
The EU is focusing on the integration of RISC-V and high-performance computing, and in December 2018, the EU launched the European Processor Initiative to develop self-contained, low-power microprocessors for the European market, reducing the European supercomputing industry's dependence on foreign technology companies. In December, the EU launched the European Processor Initiative to develop autonomous, controllable, low-power microprocessors for the European market and reduce the European supercomputing industry's dependence on foreign technology companies. The European Processor Accelerator project, a key component of the initiative, centers on the free and open-source RISC-V instruction set architecture for the development and production of high-performance chips in Europe. In September 2021, the latest result of the program was the delivery of 143 samples of European Processor Accelerator chips designed for High Performance Computing (HPC) applications. In addition, the Euro HPC eProcessor project, which began in January 2021, aims to build a fully open-source European full-stack ecosystem for HPC and embedded applications based on the RISC-V instruction set architecture.
India has positioned the RISC-V instruction set as the de facto instruction set of the country, and in 2011, India started the Processor Strategic Program to fund 2-3 processor research projects per year. The SHAKTI processor project under this program aims to develop the first indigenous Indian industrial-grade processor; its goal is to develop six open-source processor cores based on the RISC-V instruction set, covering 32-bit single-core microcontrollers, 64-core, 64-bit high-performance processors, and secure processors, etc. In January 2016, the Ministry of Electronics and Information Technology (MoEIT) of India funded $45 million for the development of a 2-bit RISC-V instruction set-based processor core. In January 2016, India's Ministry of Electronics and Information Technology funded $45 million to develop a 2 GHz quad-core processor based on the RISC-V instruction set. 2017, the Indian government stated that it would heavily fund RISC-V-based processor projects to make RISC-V India's de facto national instruction set. In August 2020, the Government of India launched the nationwide Microprocessor Challenge program to promote independent RISC-V microprocessor research and development and to improve the country's semiconductor design and manufacturing capabilities.
Israel, Pakistan, and Russia have sought to diversify their instruction set architectures*** In 2017, Israel's National Innovation Authority established the GenPro Working Group to develop fast, efficient, and independent RISC-V-based processing platforms, and in 2019, the Pakistani government announced that it had made RISC-V its national "preferred architecture". In 2019, the Pakistani government announced that RISC-V is the national "preferred architecture" and in 2021, Russia announced a national digitization program centered on RISC-V components based on Russia's own Elbrus chip to scale up RISC-V components.
China is trying to break the chip technology blockade through RISC-V. In 2021, in the Outline of the Fourteenth Five-Year Plan for the National Economic and Social Development of the People's Republic of China and the Visionary Goals for the Year 2035, China for the first time explicitly included "open source" in its five-year development plan; "During the 14th Five-Year Plan period, China will support the development of digital technology open source communities and other innovation consortia, improve open source intellectual property rights and the legal system, and encourage enterprises to open up their software source codes, hardware designs and application services. At the same time, governments at all levels are actively laying out RISC-V architecture chips. in July 2018, the Notice of Shanghai Municipal Commission of Economy and Information Technology on Carrying Out the Second Batch of Projects for the Development of Shanghai Software and Integrated Circuit Industry Special Funds for the Year 2018 (in the Field of Integrated Circuits and Electronic Information Manufacturing), released by the Shanghai Municipal Commission of Economy and Information Technology, listed RISC-V-related industries in the government's industrial In February 2020, the Notice on Several Opinions on Accelerating the Development of Semiconductor and Integrated Circuit Industry issued by the General Office of the People's Government of Guangdong Province explicitly included RISC-V chip design in the key development direction of Guangdong Province.2021 In November 2021, the Beijing Municipal Party Committee and Municipal Government issued the "Fourteenth Five-Year Plan" for the development of the Beijing municipal government, and the "Fourteenth Five-Year Plan" for the development of the Beijing municipal government. In November 2021, Beijing Municipal Party Committee and Municipal Government issued the "Beijing International Science and Technology Innovation Center Construction Plan in the 14th Five-Year Plan Period", which explicitly pointed out the need to research and develop RISC-V based blockchain special acceleration chips to further improve chip integration and enhance the performance of large-scale blockchain algorithms.
Important Research Directions and Hot Spots in China's RISC-V Architecture Chip Field
Academia and industry are paying increasing attention to the design and verification of RISC-V security architecture. Processor security is critical to the protection of private device information; designing RISC-V secure processors and verifying security is a hot research topic in the RISC-V field and even in the architecture field. Privileged mode and physical memory protection are essential features of secure embedded processors, and the RISC-V instruction set architecture also adopts privileged mode to ensure processor security; at the same time, the architecture provides physical memory protection unit (PMP) to realize memory access control to ensure memory security. Among them, Pengyuan Jiao et al. from Beijing University of Information Science and Technology (BUIST) and Institute of Microelectronics, Tsinghua University (IMTSU) took a 32-bit RISC-V secure processor as the object of research, and proposed a set of test schemes for RISC-V privileged mode and physical memory protection by observing the processor's state and exception information through exception handlers; and Qiang Liu et al. from Microelectronics Institute, Tianjin University (TU) designed a RISC-V processor with resistance to the power analysis attack. Liu Qiang et al. from Microelectronics School of Tianjin University designed an implementation method for RISC-V processors that is resistant to power analysis attacks; the Institute of Parallel and Distributed Systems of Shanghai Jiaotong University developed a new trusted execution environment "Penglai" based on the RISC-V architecture. Meanwhile, many companies in the industry have introduced security solutions in the form of extended hardware IP modules, including cryptographic libraries, root of trust, and security libraries.
Addressing emerging areas such as the Internet of Things (IoT), domain-specific RISC-V chips are booming. Currently, the X86 and ARM instruction sets dominate servers, personal computers (PCs), and embedded mobile devices; meanwhile, application areas such as the Internet of Things (IoT) and the Internet of Intelligence (AIoT) are providing new opportunities for RISC-V. The RISC-V architecture brings significant flexibility and cost advantages to the IoT industry, and also promotes rapid development of heterogeneous computing systems, making it suitable for smart IoT. The RISC-V architecture offers significant flexibility and cost advantages for the IoT industry, while also enabling the rapid development of heterogeneous computing systems that can adapt to the high-capacity trillions of interconnected devices, rich scenarios, and fragmented and diverse requirements of the smart IoT era. The main applications include aerospace chip design for spacecraft, smart chips for the Internet of Things, security-oriented chips, controllers for motherboard management in servers, and controllers inside GPUs and hard disks. Academics, such as the ubiquitous computing team of the Institute of Computing Technology of the Chinese Academy of Sciences (hereinafter referred to as "ICC"), have carried out research on lightweight neural network processors based on RISC-V cores, and explored the application of RISC-V cores in IoT devices; and the Key Laboratory of BeiDou Navigation and Positioning Service of Shanghai Municipal Government has developed a RISC-V instruction-set-based neural network processor for IoT. The Shanghai Key Laboratory of Compass Navigation and Location Services has carried out a research project on baseband processor extension based on RISC-V instruction set. The industry has seen a large number of RISC-V-based products and applications in the control and IoT fields. For example, the open source RISC-V series of processors from Ali Pingtou Semiconductor Co., Ltd. have been used in microcontrollers, industrial control, smart home appliances, smart grid, image processing, artificial intelligence, multimedia, and automotive electronics.
Seeking to break through the Internet of Things ecosystem, explore into the field of servers, high-performance processors. Currently, RISC-V's research and application areas are mainly focused on IoT-based industrial control, smart grid and other scenarios. However, RISC-V has the potential to enter the server and high-performance fields due to its low-power and low-cost characteristics. The increased demand for gas pedals and heterogeneous platforms for server customization and HPC provides an opportunity for RISC-V to enter the server and HPC fields. Yungang Bao of ICC proposed that the industry can utilize AMD's Chiplet method to put the central processing unit (CPU), gas pedal, and input/output (I/O) on different wafers, in which the CPU part uses the RISC-V architecture, and the Chiplet method is used to form a server chip to enter the server market. In June 2021, the Yungang Bao team of ICC launched the "Xiangshan" open source high-performance RISC-V processor core. The first version of the architecture, code-named "Yanqihu", is based on the 28 nm process. This marks the birth of a domestic open source project for high-performance RISC-V processors with technical support from the Institute of Computing and Pengcheng Laboratory.
Issues and recommendations for the development of RISC-V architecture chips in China
Focus on the RISC-V architecture appropriately to accelerate the development of China's chip industry system. At present, the domestic processor industry and scientific research fields have adopted an all-encompassing instruction set, and academia and industry have expanded based on a variety of instruction sets such as ARM, MIPS, PowerPC, SPARC, RISC-V, X86, and so on. However, diversified instruction sets will inevitably disperse the basic software development power, resulting in compilation, operating system and other basic software developers can not take into account the optimization of a variety of instruction sets due to limited energy, slowing down the construction of the independent ecosystem. In recent years, with the relocation of the RISC-V Foundation from the U.S. to Switzerland, its governance structure has undergone significant changes, and the proportion of China's scientific research institutions and enterprises in the high-level membership of the RISC-V Foundation Board has increased significantly. China's growing influence in the RISC-V ecosystem provides new opportunities for the development of China's chip industry, as well as the possibility of developing new tracks. Recommendation: China should seize the opportunity of the rise of open source RISC-V architecture, adjust the technical route and industrial policy in the chip field, focus on RISC-V architecture appropriately, and accelerate the development of China's chip industry system in the absence of a mature and independent instruction set architecture for the time being.
Promote the application of RISC-V in processor education and cultivate chip design talents. The high threshold of innovation and high investment in the chip field have seriously hindered innovative research in the field. Multiple aspects of chip design and manufacturing require huge amounts of capital and a large amount of labor input. This high threshold has led to a lack of talent reserves, so how to lower the threshold of chip design has become an urgent problem. the open source nature of RISC-V has lowered the threshold of innovation investment, and the development of open-source chips/hardware has become a new development mode for China to cultivate design talents. in August 2019, the University of Chinese Academy of Sciences launched the "One Lifetime, One Core" program, whose goal is to develop a new generation of chip designers. In August 2019, the University of Chinese Academy of Sciences launched the "One Lifetime One Chip" program, whose goal is to cultivate processor chip design talents with solid theoretical and practical experience by allowing undergraduate students to design processor chips and complete the flow of chips. This program is the first domestic education program aimed at flow chip, and five 2016 undergraduates took the lead in completing the design of a 64-bit RISC-V processor SoC chip and realized the flow chip. In fact, students are an indispensable force in the construction of the entire RISC-V ecosystem; many domestic institutions, including the Shanghai University of Science and Technology, are working with enterprises to train talents, and through the design of coursework associated with the R&D of enterprises, the latest technology of enterprises is introduced into the classroom in a timely manner, so as to give full play to the advantages of open source. The suggestion is that national education authorities should actively promote the development of the RISC-V industry-academia combination model to cultivate more chip design talents.
(Contributed by Proceedings of the Chinese Academy of Sciences)