Existing Understanding of Temperature Gradients
The general approach to estimating the junction temperature of an IC chip is to utilize a condensed package model, which includes the maximum junction temperature for a given package, the maximum ambient temperature, the maximum permissible power dissipation, and the thermal resistance (R?JA, junction to ambient) of this package. There may be several thermal resistances in different reduced package models, but the application of such models all involve a linear equation as shown in Figure 1.
Figure 1 Junction Temperature under the Condensed Model
The distribution state of the power source causes the junction temperature to vary, but the condensed packaging model does not capture the effect of this variation. By using a single total power figure, the resulting junction temperature is assumed to be a single (usually worst-case) figure. In fact, the power sources are dispersed, and when their combined effect is considered, the following two important issues arise:
(a) Junction temperature variations, which lead to temperature gradients between circuit cells
(b) Maximum junction temperatures can exceed the figure calculated by the thinning model
Figure 2(a) gives, in the case of the module chosen to implement a particular mode of operation on a chip The temperature distribution within the channel region of the die under the actual location and power density conditions of the module and device. The different colors of the temperature distribution show that several temperature values exist within the channel. The total average value of the temperature is similar to the temperature obtained by calculations based on the refined model. However, the former is generally higher because the equation controlling the connected heat source is nonlinear, while the lite model considers it linear. The maximum temperature of the junction may be much higher, as shown in Figure 2(a).
Without thermal analysis, it is impossible for the designer to know the true junction temperature early in the project, which can affect the choice of chip package and thermal solution. Knowing the chip temperatures and gradients can also influence circuit layout (to ensure that critical devices are at similar temperatures) and physical size (to ensure that the chip is reliable enough at actual operating temperatures).
The impact of temperature gradients on chips should be better understood
Temperature affects electronic components such as diodes, resistors, capacitors, and transistors to varying degrees. Mixed-signal designs increasingly require high-speed, low-voltage, and high-complexity designs on chips with uneven internal power densities, which can dramatically increase the temperature gradient of the chip. Designers therefore need to consider the impact of temperature gradients on the overall chip.
Analog designs can be particularly sensitive to temperature differences of even a few degrees Celsius. To avoid performance degradation and parameter failure, the wiring of such circuits must strictly adhere to the symmetry of the circuit, which makes understanding the temperature distribution even more important. Thermally induced design problems include input offsets in differential amplifiers, errors in high-resolution converters, reference voltage drift in regulation circuits, and DC gain loss in op amps.
The utility of thermal analysis
Voltage and current reference sources are widely used in analog circuits. A closer look at the characteristics of bandgap reference circuits shows the utility of thermally analyzing the entire chip. This reference source is a stabilized DC source that is independent of changes in process parameters, rail voltages, and specified temperatures. Bandgap reference circuits are one of the most widely used circuits in IC design, and are used in DRAM and flash memory, and analog devices.
The bandgap generates a voltage that should be independent of temperature, and this voltage is generated by adding a voltage that decreases as the temperature rises (called contrary to absolute temperature, or CTAT for short) to a voltage that increases as the temperature of the bandgap circuit element rises (called proportional to absolute temperature, or PTAT for short).The CTAT voltage is created by tapping the positively-biased, bipolar transistor's The CTAT voltage is generated by tapping the base-emitter of a positively biased bipolar transistor, while the PTAT voltage is generated using the base-emitter voltage difference between two bipolar transistors. These two bipolar transistors have different magnitudes of base-emitter voltages although the total current flowing through them is equal. A basic assumption here is that the region where the devices in the PTAT circuit are located is an isothermal region. However, this assumption is often not true given the complex temperature variations across the chip.
For example, because the base-emitter voltage is nonlinear with respect to temperature, bandgap circuits do not operate correctly when there is a temperature gradient between two PTAT transistors. However, if the temperature characteristics can be understood before placing these devices at the design stage or positioning them in the circuit, errors in bandgap circuits can be prevented by arranging them along isothermal lines. One of the purposes of the temperature-aware feature described below is to provide this type of information during the design of analog circuits to prevent bandgap circuit errors.
Such circuits as temperature sensors do not function properly when the temperature difference between transistors in a bandgap circuit is less than a few degrees Celsius, and in some automotive applications, the temperature gradient on a die can be more than 70 to 80 degrees Celsius! There are also applications in process control.
How to place temperature sensors to avoid failures caused by temperature variations
As power density increases, temperature gradients become harder to predict. Typically, a diode is implanted on the substrate of a test chip to characterize the spatial steady-state temperature of the die. A lack of prior knowledge of the temperature characteristics can result in the placement of temperature sensors in the chip that do not reflect the maximum temperature or maximum temperature gradient. This can lead to incorrect conclusions generated by testing the chip, as well as placing the bandgap device in an area where a temperature gradient exists, which can result in the bandgap circuit not operating correctly.
Figure 4
The conventional bandgap reference voltage is 1.2V, but as the supply voltage drops to 1.2V or even lower, the temperature compensation needs to be increased. Conventional bandgap reference circuits can only compensate for temperature to the first order, and when the reference voltage is lower, the effect of temperature is greater, and additional circuits are needed for higher-order temperature compensation. So it becomes increasingly important to know the temperature distribution on the die and design against the temperature gradient to avoid circuit failures caused by temperature.
As mentioned earlier, we need to pay special attention to the layout of analog circuits. The physical characteristics of the integrated devices and their relationship to the electrical characteristics must be balanced. Thus, the layout process for analog circuits requires a feedback loop that accounts for constraints such as device mismatch, crosstalk, design rules, and temperature. However, isotherms on the substrate cannot be obtained without detailed thermal analysis, so in most of today's designs this feedback loop is often not closed prior to fabrication and testing. Figure 3 illustrates how problems can arise from using the standard public **** center-of-mass wiring method to determine the location of temperature sensors without thermal analysis, because the temperature gradient has not been correctly estimated.
In this example, a steady-state temperature analysis of the circuit shows the error conditions for a PTAT failure. Although designers are usually more concerned with the steady-state performance of analog circuits, most circuit simulation programs still focus on transient analysis. Sometimes, the thermal time constants (usually on the millisecond scale) of an integrated device affect its electrical behavior, so transient thermal simulations are needed and the effect of thermal time constants on the transient electrical behavior of the device is investigated. However, a full thermal analysis of the entire chip (using direct methods) takes a surprisingly long time. A more efficient way to perform full chip-level transient and steady-state thermal effects analysis is to have a thermal analysis engine interact with a circuit simulator at some discrete point in time.
Integrating Thermal Analysis into the Design Flow
Figure 4 depicts the design environment for an analog design. Temperature analysis is integrated into the design flow through a standard data format. Design data is read directly into the thermal analysis engine, and then power consumption values are read directly from simulation data or power analysis tools, as is common in digital circuits.
The output of the thermal analysis is used to update the temperatures of individual devices as well as connected areas. Once this information is updated, the power and parasitic values of the device are also corrected. This step involves consistent name mapping between the netlist (simulation format and/or design format) and the physical instance. This electro-thermal loop between circuit analysis and temperature analysis is used to capture the effect of heat on circuit behavior. Both steady state and transient problems can be solved using the flow described in Figure 4.
The shrinking size of integrated circuits, the increasing level of integration, and the mix of analog and digital logic circuits on the same chip are increasing the number of temperature-induced design problems. The need for on-chip thermal analysis at the design stage is growing and is being recognized. Incorporating thermal analysis (using thermal and electrical models as well as package characterization of the chip) into the standard design flow allows designers to detect and fix heat-related problems early in the design. Once detected, thermal problems can be addressed in several ways, such as layout planning adjustments or improvements to the chip package. Utilizing temperature and temperature gradient information for each device, designers can determine the performance and correctness of their design prior to silicon flow, avoiding costly chip failures and design rework.