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PTP synchronization principle of time synchronization means to adjust the internal clock of the device being granted time by adjusting the frequency and phase according to the standard time received. The phase of the clock is expressed numerically as what we call the moment. Time synchronization has the two main functions of granting and keeping time, in layman's terms, granting time is "on the table", through irregular action on the table, the local time and standard time for phase synchronization; keeping time that is, in the gap between the table, the local time and the standard time can not be too big a deviation between the time.
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The principle of PTP timing is that in the same LAN, the master clock periodically sends time synchronization messages, the slave clock receives the synchronization messages, and at the same time randomly sends a delay request message to the master clock, and then adjusts the deviation of its own clock through the synchronization algorithm.
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Synchronizing the data stream from the master clock's system is done by the PTP protocol, and then it goes through the transport layer, the network layer, and the data link layer. The network multicast is responsible for sending the data stream to the switch, the switch will forward the data packet to the same multicast group, the slave clock of the same multicast group will receive the synchronization packet, and then send it from the link layer to the PTP protocol layer for unpacket processing. At the same time, the delayed request message sent by the slave clock will be packetized by the slave clock protocol layer, and then transmitted back to the master clock through the network link, the principle of back and forth transmission is similar.
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After repeated round-trip calculations to get a more ideal deviation value, through the calculation of the deviation ratio between the slave clock and the master clock to get the slave clock and the master clock between the phase difference and frequency difference, the deviation obtained by the complementary taste to the slave clock device, so as to achieve the master-slave clock device consistent.
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The design of PTP clock-granting hardware, ptp clock-granting accuracy is theoretically affected by two aspects, on the one hand, the location of the timestamp and the other is the software synchronization algorithm. Timestamping can currently be done on the physical layer, data link layer and application layer, while the accuracy will be reduced in turn.
SYN2401 PTP Master Clock
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This article discusses the Ethernet-based transport medium, the way to timestamp at the physical layer, which can be implemented to achieve higher synchronization accuracy. The PTP data stream in this way changes the standard Ethernet physical layer chip, and uses a higher precision Ethernet physical layer chip with IEEE1588 PTP function. Generally speaking, the hardware unit includes the UDP user packet protocol transport layer, the IP transport layer of the network connection protocol, the MAC data link layer, the transport layer, and the PHY physical layer.
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PTP clock software design
The software adopts a layered model, modular design ideas, the protocol stack and platform-related parts of the separation, so that it can be easily transplanted to any platform, in the debugging of the system and the deletion of functionality to add the operation is very convenient.
The system initialization unit is mainly used to initialize the timer, system log module, configuration module and so on. Initialization includes, but is not limited to, resource allocation, creating timers, creating message queues, and initializing system logs. The timer is used to complete the logical operation of PTP protocol interaction to ensure the normal operation of PTP protocol. The message queue is responsible for providing the user with an external API interface to facilitate access to abnormal information that occurs during the operation of the PTP protocol.
SYN2401 PTP Master Clock
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Here we need to explain the human-computer interaction unit, which is mainly composed of a configuration module and a test module. The former is used to provide a parameter configuration interface to receive user-input configuration requests, and configure the system parameters of the PTP protocol according to the configuration requests. The former is used to provide the parameter configuration interface, receive the configuration request from the user, and configure the system parameters of the PTP protocol implementation according to the configuration request; the latter is responsible for providing the application programming interface for testing and testing the functions of the PTP protocol required by the test request. The user inputs the test request, which is accomplished by the test module.
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The protocol engine unit consists of a timer, a PTP message processing module, a network communication module, a synchronization algorithm module, and a clock processing module. The timer, as its name implies, provides timing functions for the operation of the PTP protocol, and there are generally three types of timers such as synchronization interval timer, reception timeout timer and delayed request interval timer etc. The ptp message processing module generally handles synchronization, following, delayed request and delayed response messages, and organizes and encapsulates a variety of ptp messages according to the ptp protocol and sends ptp messages through the network communication module. The ptp message is organized and encapsulated according to the ptp protocol, and sent through the network communication module, or received from the network communication module, and obtains the send timestamp and receive timestamp of each PTP message.
SYN2401 PTP master clock
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ptp timing clock products to adapt to the higher precision time synchronization, the introduction of nanoseconds time synchronization technology PTP. ptp timing series products, including the PTP master clock and the slave clock, and in addition to the PTP timing boards, which are divided into serial port timing and bus control board. Serial timing and bus control of two kinds, the use of high-speed integrated chip to realize the hardware time stamp marking function, greatly improving the timing and timing accuracy.
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ptp license clock is mainly divided into master clock and slave clock, general 1588 clock is the master and slave sets of use, so you can choose SYN2401 PTP master clock and SYN2403 PTP slave clock, if there is a 1588 clock integration capabilities, you can choose a variety of 1588 clock boards, core and block boards. board and the whole board, 1588 core board is compact, can do the master clock can also be done from the clock, cost-effective, time information, non-continuous regulation of the device clock.
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Time synchronization has two main functions: timing and timekeeping, with a common voice description, timing is "on the table". By irregularly pairing the table action, the local moment and standard moment phase synchronization; timekeeping to ensure that in the gap between the table, the local moment and the standard moment deviation is not too large.