1, mode 0
Serial interface mode 0 for the shift register I / O mode. In the serial port external shift register to extend the I / O interface, can also be connected to an external serial synchronous I / O device.
(1) Mode 0 Output
When the serial port transmits in mode 0, the data is output serially at the RXD terminal and the synchronization signal is output at the TXD terminal. When a data is written to the serial port transmitter buffer, the serial port transmitter is activated to output the data serially from the RXD terminal at a baud rate of one-twelfth of the oscillation frequency.
(2) Mode 0 Input
When the serial port is defined as Mode 0 and REN is set, the serial port receives data in Mode 0. At this time, the RXD terminal is the data input terminal, and the TXD terminal is the synchronization pulse signal output terminal. The receiver receives the data input from the RXD terminal at a baud rate of one-twelfth of the oscillation rate. However, when the receiver receives 8-bit data, it sets the 1 interrupt flag RI.
2. Mode 1
When the serial interface is defined to work in mode 1, it is controlled to be an 8-bit asynchronous communication interface, which transmits a frame of information as 10-bit, of which 1-bit is the start bit, 8-bit is the data bit (first low and then high), and 1-bit is the stop bit.
(1) Mode 1 Output
When the serial interface sends in mode 1, the data is output from the TXD terminal, and the CPU executes an instruction to write the data into the transmit buffer
SBUF (e.g. MOV SBUF, A), and when the data bytes are written into the SBUF, the serial transmitter starts to transmit, and after a frame is transmitted, the transmit interrupt flag is set to 1 and TI is set.
(2) Mode 1 Input
When the serial port receives in mode 1, data is input from the RXD terminal. After REN is set to 1, the receiver is allowed to receive. The receiver divides the counter by 16 times the established baud rate for time synchronization. The 16 states of the counter divide the time of one bit into 16 equal parts. In the 7th, 8th and 9th count states of each time, the bit detector samples the value of RXD, and the received value is the same value at least twice out of the 3 samples to exclude noise interference. If the value received at the start is not 0, the start bit is invalidated and the receive circuit is reset. The receiver is restarted again when another 1 to 0 jump is detected. If the value received is 0 and the start bit is valid, reception of the rest of the information for this frame begins. When RI = 0 and the received stop bit is 1 (or SM2 = 0), the stop bit goes to RB8 and the received 8-bit data goes to the receive buffer SBUF, setting the RI interrupt flag. Then reception searches for the start bit of another frame of information.
3, mode 2 and mode 3
Serial interface operation mode 2 and mode 3, is defined as a 9-bit asynchronous communication interface. Transmitting a frame of information is 11 bits, with 1 start bit, 8 data bits (from low to high), 1 additional 9th data bit that can be programmed as 1 or 0, and 1 stop bit.
The difference between Mode 2 and Mode 3 is simply that the baud rate is not the same. Mode 2 has a fixed baud rate of 2SMOD/64 (the oscillation frequency), while Mode 3 has a variable baud rate of 2SMOD/32 (the overflow rate of T1).
The only difference between Mode 2 and Mode 3 when transmitting and receiving is the different baud rates.
(1) Mode 2 and Mode 3 send
When Mode 2 or Mode 3 sends, the data is output from the TXD terminal, and a frame is sent out with 11 bits of information, and the additional 9th bit of data is TB8 in SCON, and the CPU executes an instruction to write data into the send buffer SBUF, and then starts the transmitter to send it out, and after sending out a frame of information, sets "1" TI interrupt flag.
(2) Mode 2 and Mode 3 Receiving
When the serial port is defined as Mode 2 or Mode 3 receiving, the data is input from the RXD terminal, and after setting REN = 1, the receiving process starts. When a negative jump from high to low is detected at the RXD terminal, the validity of the start bit is confirmed, and reception of the rest of the frame begins. After receiving a frame of information, when RI = 0, SM2 = 0, or when the 9th bit of data is received as "1", the 8-bit data is loaded into the receive buffer, and the 9th bit of data is loaded into RB8 in SCON and RI is set to 1. If the above two conditions are not met, the received information will be lost, and RI will not be set.